The present invention relates to electrical connections made on printed circuit boards (PCBs) or within integrated passive devices (IPDs) for the purposes of connecting various electrical components. Specifically, the present invention relates to the use of vias to connect electronic components on and within multi-layer electrical devices, including IPDs. More specifically, the present invention relates to the use of blind vias to house electronic components in an effort to provide vertical electrical connections within electronic devices.
With the ever-increasing demand for additional features and the expectations of longer battery life in present day electronic devices, circuit and component designers have responded with smaller component designs requiring less voltage. The result has been not only an increase in device operation speed or operating frequency, but also an increase in package density. In addition to integrated circuitry, the use of multi-layered printed circuits has aided in reducing the space requirements of advanced circuitry for portable electronic devices.
In today's typical multi-layer printed circuit boards, the components, both active and passive, are soldered to the surface of the circuit board. Conductive paths are formed on the surface, usually by photolithography, and are connected by conductive vias to internal conductors, which form a complex series of three-dimensional interconnections.
As a result of the reduction in relative sizes, however, a point has been reached where the components themselves are difficult to handle and the lands to which they must be attached have not been capable of a comparable reduction in size. Further, the available line and space widths of the conductive paths have reached a practical limit of about 5–10 mils, without going to special, and expensive high density processing.
In an attempt to resolve these problems, two main approaches have been undertaken: first, designers have begun using integrated passive devices (IPDs) in which multiple passive components are incorporated into a single package for positioning within the circuit. Second, designers have incorporated special layers within the circuit board itself to provide capacitive and resistive functions, which may be customized as required. These approaches serve only to save space on the surface of the PCB itself
Unfortunately, neither of these two approaches solves both the need for space savings and increased flexibility in introducing components other than capacitors and resistors into the PCB or IPD. For example, the use of an IPD on a PCB is not attractive where its design would require significant re-routing of the surface traces thus off-setting the intended space savings. Additionally, it is inevitable that when multiple components are placed within the same package there will be parasitics that occur. These are detrimental to the performance of the device.
Further, integrated passive devices are currently limited to providing only capacitive and resistive functions. Such a limitation fails to address the need to save space regardless of the component's function. Finally, there are economic limitations to the use of IPDs. For instance, as a custom product, integrated passive devices are a long-delivery item which increase both cost and manufacturing time of a product. Still further, in the electronics industry, customers of component manufacturers are loath to spend mote money on an unproven multi-component device as opposed to individual components with proven reliability, and tight parametric tolerances.
Similarly, the use of buried layers within the circuit board itself has numerous drawbacks. The range of available capacitive and resistive values available in the buried layers is limited and they must be preset. Additionally, the sculpting of these layers is a very cost and time-intensive process which is currently beyond the capabilities of most PCB manufacturers. For example, the board manufacturers are used to dealing with board layers of at least 250 microns while the thickness of a buried capacitive layer would need to be on the order of 50 microns or smaller to be effective. Additionally, because of their being so thin, such a layer is very fragile. Any breakage would result in an electrical fault and would require the board to be scrapped.
During further finishing of the PCB, such layers may be subjected to intense heat or other treatments required for completing the manufacturing process. Because of this treatment, the capacitive and resistive values of the layers may be inadvertently altered from the desired preset values of the layers. The PCB would then be unable to effectively operate as designed.